Imperial College London

ProfessorWayneLuk

Faculty of EngineeringDepartment of Computing

Professor of Computer Engineering
 
 
 
//

Contact

 

+44 (0)20 7594 8313w.luk Website

 
 
//

Location

 

434Huxley BuildingSouth Kensington Campus

//

Summary

 

Publications

Citation

BibTex format

@inproceedings{Jin:2011:10.1109/FPL.2011.12,
author = {Jin, Q and Luk, W and Thomas, DB},
doi = {10.1109/FPL.2011.12},
pages = {6--9},
title = {Unifying finite difference option-pricing for hardware acceleration},
url = {http://dx.doi.org/10.1109/FPL.2011.12},
year = {2011}
}

RIS format (EndNote, RefMan)

TY  - CPAPER
AB - Explicit finite difference method is widely used in finance for pricing many kinds of options. Its regular computational pattern makes it an ideal candidate for acceleration using reconfigurable hardware. However, because the corresponding hardware designs must be optimised both for the specific option and for the target platform, it is challenging and time consuming to develop designs efficiently and productively. This paper presents a unifying framework for describing and automatically implementing financial explicit finite difference procedures in reconfigurable hardware, allowing parallelised and pipelined implementations to be created from high-level mathematical expressions. The proposed framework is demonstrated using three option pricing problems. Our results show that an implementation from our framework targeting a Virtex-6 device at 310MHz is more than 24 times faster than a software implementation fully optimised by the Intel compiler on a four-core Xeron CPU at 2.66GHz. In addition, the latency of the FPGA solvers is up to 90 times lower than the corresponding software solvers. © 2011 IEEE.
AU - Jin,Q
AU - Luk,W
AU - Thomas,DB
DO - 10.1109/FPL.2011.12
EP - 9
PY - 2011///
SP - 6
TI - Unifying finite difference option-pricing for hardware acceleration
UR - http://dx.doi.org/10.1109/FPL.2011.12
ER -