Imperial College London
Professor Wayne Luk

ProfessorWayneLuk

Faculty of Engineering, Department of Computing

Professor of Computer Engineering
 
 
 
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Contact

 

+44 (0)20 7594 8313w.luk Website

 
 
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Location

 

434Huxley BuildingSouth Kensington Campus

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Summary

 

Publications

Citation

BibTex format

@inproceedings{Tse:2012:10.1007/978-3-642-28365-9_21,
author = {Tse, AHT and Chow, GCT and Jin, Q and Thomas, DB and Luk, W},
doi = {10.1007/978-3-642-28365-9_21},
pages = {251--263},
title = {Optimising performance of quadrature methods with reduced precision},
url = {http://dx.doi.org/10.1007/978-3-642-28365-9_21},
year = {2012}
}
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RIS format (EndNote, RefMan)

TY  - CPAPER
AB  - This paper presents a generic precision optimisation methodology for quadrature computation targeting reconfigurable hardware to maximise performance at a given error tolerance level. The proposed methodology optimises performance by considering integration grid density versus mantissa size of floating-point operators. The optimisation provides the number of integration points and mantissa size with maximised throughput while meeting given error tolerance requirement. Three case studies show that the proposed reduced precision designs on a Virtex-6 SX475T FPGA are up to 6 times faster than comparable FPGA designs with double precision arithmetic. They are up to 15.1 times faster and 234.9 times more energy efficient than an i7-870 quad-core CPU, and are 1.2 times faster and 42.2 times more energy efficient than a Tesla C2070 GPU. © 2012 Springer-Verlag.
AU  - Tse,AHT
AU  - Chow,GCT
AU  - Jin,Q
AU  - Thomas,DB
AU  - Luk,W
DO  - 10.1007/978-3-642-28365-9_21
EP  - 263
PY  - 2012///
SN  - 0302-9743
SP  - 251
TI  - Optimising performance of quadrature methods with reduced precision
UR  - http://dx.doi.org/10.1007/978-3-642-28365-9_21
ER  -
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