Imperial College London

ProfessorWayneLuk

Faculty of EngineeringDepartment of Computing

Professor of Computer Engineering
 
 
 
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Contact

 

+44 (0)20 7594 8313w.luk Website

 
 
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Location

 

434Huxley BuildingSouth Kensington Campus

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Summary

 

Publications

Citation

BibTex format

@article{Kurek:2011:10.1109/SPL.2011.5782623,
author = {Kurek, M and Ilkos, I and Luk, W},
doi = {10.1109/SPL.2011.5782623},
journal = {Proceedings of the 2011 7th Southern Conference on Programmable Logic, SPL 2011},
pages = {44--50},
title = {Customizable security-aware cache for FPGA-based soft processors},
url = {http://dx.doi.org/10.1109/SPL.2011.5782623},
year = {2011}
}

RIS format (EndNote, RefMan)

TY  - JOUR
AB - This paper describes a security-aware cache targeting field-programmable gate array (FPGA) technology. Our design is based on an architecture with a remapping table, which provides resilience against side-channel timing attacks. We show how this cache design can be optimised for FPGA resources by an index decoder with content addressable memory structure, which can be customized to meet various requirements. We show, for the first time, how our security-aware cache can be included in the Leon 3 processor, and its performance and resource usage are evaluated. © 2011 IEEE.
AU - Kurek,M
AU - Ilkos,I
AU - Luk,W
DO - 10.1109/SPL.2011.5782623
EP - 50
PY - 2011///
SP - 44
TI - Customizable security-aware cache for FPGA-based soft processors
T2 - Proceedings of the 2011 7th Southern Conference on Programmable Logic, SPL 2011
UR - http://dx.doi.org/10.1109/SPL.2011.5782623
ER -