In this section
@article{Wu:2011:10.1109/LMAG.2011.2129555,
author = {Wu, R and Sin, JKO and Hui, SY},
doi = {10.1109/LMAG.2011.2129555},
journal = {IEEE Magnetics Letters},
title = {Novel silicon-embedded coreless transformer for on-chip isolated signal transfer},
url = {http://dx.doi.org/10.1109/LMAG.2011.2129555},
volume = {2},
year = {2011}
}
TY - JOUR
AB - In this letter, a novel silicon-embedded coreless transformer is proposed and demonstrated. The transformer is fabricated in the thick bottom layer of a silicon substrate and connected to the frontside through vias opened in the thin top layer where all other components of the system can be fabricated. A 5-turn coreless transformer fabricated using this monolithic transformer technology achieves a small area of 2 mm2 and a good voltage gain of larger than -0.8 dB (load = 50 Ω, best reported so far) from 12 to 100 MHz. This technology shows great potential for on-chip isolated signal transfer. © 2011 IEEE.
AU - Wu,R
AU - Sin,JKO
AU - Hui,SY
DO - 10.1109/LMAG.2011.2129555
PY - 2011///
SN - 1949-307X
TI - Novel silicon-embedded coreless transformer for on-chip isolated signal transfer
T2 - IEEE Magnetics Letters
UR - http://dx.doi.org/10.1109/LMAG.2011.2129555
VL - 2
ER -