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  • Conference paper
    Demarchou E, Georgiou J, Nicolaou N, Constandinou TGet al., 2014,

    Anesthetic-induced changes in EEG activity: a graph theoretical approach

    , IEEE Biomedical Circuits and Systems (BioCAS) Conference, Pages: 45-48

    The dynamic brain networks forming during wakefulness and anesthetic-induced unconsciousness are investigated using time-delayed correlation and graph theoretical measures. Electrical brain activity (EEG) from 10 patients under propofol anesthesia during routine surgery is characterized using the shortest path length, λ, and clustering, c, extracted from time delayed correlation. An increase in λ and c during anesthesiareveals disruption of long-range connections and emergence of more localized neighborhoods. These changes were not a result of volume conduction, as were based on time-delayed correlation. Our observations are in line with theories of anesthetic action and support the use of graph theoretic measures to study emerging brain networks during wakefulness and anesthesia.

  • Journal article
    Ruz ID, Schultz SR, 2014,

    Localising and classifying neurons from high density MEA recordings

    , JOURNAL OF NEUROSCIENCE METHODS, Vol: 233, Pages: 115-128, ISSN: 0165-0270
  • Journal article
    Paraskevopoulou SE, Wu D, Eftekhar A, Constandinou TGet al., 2014,

    Hierarchical Adaptive Means (HAM) Clustering for Hardware-Efficient, Unsupervised and Real-time Spike Sorting.

    , Journal of Neuroscience Methods, Vol: 235, Pages: 145-156, ISSN: 1872-678X

    This work presents a novel unsupervised algorithm for real-time adaptive clustering of neural spike data (spike sorting). The proposed Hierarchical Adaptive Means (HAM) clustering method combines centroid-based clustering with hierarchical cluster connectivity to classify incoming spikes using groups of clusters. It is described how the proposed method can adaptively track the incoming spike data without requiring any past history, iteration or training and autonomously determines the number of spike classes. Its performance (classification accuracy) has been tested using multiple datasets (both simulated and recorded) achieving a near-identical accuracy compared to k-means (using 10-iterations and provided with the number of spike classes). Also, its robustness in applying to different feature extraction methods has been demonstrated by achieving classification accuracies above 80% across multiple datasets. Last but crucially, its low complexity, that has been quantified through both memory and computation requirements makes this method hugely attractive for future hardware implementation.

  • Journal article
    Reichenbach T, Hudspeth AJ, 2014,

    The physics of hearing: fluid mechanics and the active process of the inner ear

    , REPORTS ON PROGRESS IN PHYSICS, Vol: 77, ISSN: 0034-4885
  • Conference paper
    Tchumatchenko T, Reichenbach T, 2014,

    A wave of cochlear bone deformation can underlie bone conduction and otoacoustic emissions

    , 12th International Workshop on the Mechanics of Hearing, Publisher: AIP Publishing LLC, ISSN: 0094-243X

    A sound signal is transmitted to the cochlea through vibration of the middle ear that induces a pressure difference across the cochlea’s elastic basilar membrane. In an alternative pathway for transmission, the basilar membrane can also be deflected by vibration of the cochlear bone, without participation of the middle ear. This second pathway, termed bone conduction, is increasingly used in commercial applications, namely in bone-conduction headphones that deliver sound through vibration of the skull. The mechanism of this transmission, however, remains unclear. Here, we study a cochlear model in which the cochlear bone is deformable. We show that deformation of the cochlear bone, such as resulting from bone stimulation, elicits a wave on the basilar membrane and can hence explain bone conduction. Interestingly, stimulation of the basilar membrane can in turn elicit a wave of deformation of the cochlear bone. We show that this has implications for the propagation of otoacoustic emissions: these can emerge from the cochlea through waves of bone deformation.

  • Journal article
    Luan S, Williams I, Constandinou TG, Nikolic Ket al., 2014,

    Neuromodulation: present and emerging methods

    , Frontiers of Neuroengineering, Vol: 7, ISSN: 1662-6443

    Neuromodulation has wide ranging potential applications in replacing impaired neural function (prosthetics), as a novel form of medical treatment (therapy), and as a tool for investigating neurons and neural function (research). Voltage and current controlled electrical neural stimulation (ENS) are methods that have already been widely applied in both neuroscience and clinical practice for neuroprosthetics. However, there are numerous alternative methods of stimulating or inhibiting neurons. This paper reviews the state-of-the-art in ENS as well as alternative neuromodulation techniques - presenting the operational concepts, technical implementation and limitations - in order to inform system design choices.

  • Journal article
    Williams I, Constandinou TG, 2014,

    Computationally Efficient Modelling of Proprioceptive Signals in the Upper Limb for Prostheses: a Simulation Study

    , Frontiers in Neuroscience, Vol: 8, Pages: 1-13

    Accurate models of proprioceptive neural patterns could one day play an important role in the creation of an intuitive proprioceptive neural prosthesis for amputees. This paper looks at combining efficient implementations of biomechanical and proprioceptor models in order to generate signals that mimic human muscular proprioceptive patterns for future experimental work in prosthesis feedback. A neuro-musculoskeletal model of the upper limb with 7 degrees of freedom and 17 muscles is presented and generates real time estimates of muscle spindle and Golgi Tendon Organ neural firing patterns. Unlike previous neuro-musculoskeletal models, muscle activation and excitation levels are unknowns in this application and an inverse dynamics tool (static optimisation) is integrated to estimate these variables. A proprioceptive prosthesis will need to be portable and this is incompatible with the computationally demanding nature of standard biomechanical and proprioceptor modelling. This paper uses and proposes a number of approximations and optimisations to make real time operation on portable hardware feasible. Finally technical obstacles to mimicking natural feedback for an intuitive proprioceptive prosthesis, as well as issues and limitations with existing models, are identified and discussed.

  • Journal article
    Eftekhar A, Juffali W, El-Imad J, Constandinou TG, Toumazou Cet al., 2014,

    Ngram-derived Pattern Recognition for the Detection and Prediction of Epileptic Seizures

    , PLOS One, Vol: 9, Pages: 1-15

    This work presents a new method that combines symbol dynamics methodologies with an Ngram algorithm for the detection and prediction of epileptic seizures. The presented approach specifically applies Ngram-based pattern recognition, after data pre-processing, with similarity metrics, including the Hamming distance and Needlman-Wunsch algorithm, for identifying unique patterns within epochs of time. Pattern counts within each epoch are used as measures to determine seizure detection and prediction markers. Using 623 hours of intracranial electrocorticogram recordings from 21 patients containing a total of 87 seizures, the sensitivity and false prediction/detection rates of this method are quantified. Results are quantified using individual seizures within each case for training of thresholds and prediction time windows. The statistical significance of the predictive power is further investigated. We show that the method presented herein, has significant predictive power in up to 100% of temporal lobe cases, with sensitivities of up to 70–100% and low false predictions (dependant on training procedure). The cases of highest false predictions are found in the frontal origin with 0.31–0.61 false predictions per hour and with significance in 18 out of 21 cases. On average, a prediction sensitivity of 93.81% and false prediction rate of approximately 0.06 false predictions per hour are achieved in the best case scenario. This compares to previous work utilising the same data set that has shown sensitivities of up to 40–50% for a false prediction rate of less than 0.15/hour.

  • Journal article
    Longden KD, Muzzu T, Cook DJ, Schultz SR, Krapp HGet al., 2014,

    Nutritional State Modulates the Neural Processing of Visual Motion

    , CURRENT BIOLOGY, Vol: 24, Pages: 890-895, ISSN: 0960-9822
  • Journal article
    Leene LB, Constandinou TG, 2014,

    Ultra-low power design strategy for two-stage amplifier topologies

    , Electronics Letters, Vol: 50, Pages: 583-585, ISSN: 0013-5194

    A novel two-stage amplifier topology and ultra-low power design strategy for two-stage amplifiers that utilises pole zero cancellation to address the additional power requirements for stability are presented. For a 288 nA total bias, the presented amplifier achieves a 1.07 MHz unity gain frequency with a 8560 pF MHz/mA figure of merit.

  • Journal article
    Luan S, Constandinou TG, 2014,

    A Charge-Metering Method for Voltage-Mode Neural Stimulation

    , Journal of Neuroscience Methods, Vol: 224, Pages: 39-47, ISSN: 0165-0270

    Electrical Neural Stimulation is the technique used to modulate neural activity by inducing an instantaneous charge imbalance. This is typically achieved by injecting a constant current and controlling the stimulation time. However, constant voltage stimulation is found to be more energy-efficient although it is challenging to control the amount of charge delivered. This paper presents a novel, fully-integrated circuit for facilitating charge-metering in constant voltage stimulation. It utilises two complementary stimulation paths. Each path includes a small capacitor, a comparator and a counter. They form a mixed-signal integrator that integrates the stimulation current onto the capacitor whilst monitoring its voltage against a threshold using the comparator. The pulses from the comparator are used to increment the counter and reset the capacitor. Therefore, by knowing the value of the capacitor, threshold voltage and output of the counter, the quantity of charge delivered can be calculated. The system has been fabricated in 0.18μm CMOS technology, occupying a total active area of 339μm×110μm. Experimental results were taken using: (1) a resistor-capacitor EEI model and (2) platinum electrodes with ringer solution. The viability of this method in recruiting action potentials has been demonstrated using a cuff electrode with Xenopus Sciatic nerve. For a 10nC target charge delivery, the results of (2) show a charge delivery error of 3.4% and a typical residual charge of 77.19pC without passive charge recycling. The total power consumption is 45μW. The performance is comparable with other publications. Therefore, the proposed stimulation method can be used as a new approach for neural stimulation.

  • Conference paper
    Yang Y, Boling S, Eftekhar A, Paraskevopoulou SE, Constandinou TG, Mason AJet al., 2014,

    Computationally efficient feature denoising filter and selection of optimal features for noise insensitive spike sorting

    , IEEE Annual Meeting of the Engineering in Biology and Medicine Society (EMBC), Publisher: IEEE
  • Conference paper
    Zheng L, Leene L, Liu Y, Constandinou TGet al., 2014,

    An Adaptive 16/64 kHz, 9-bit SAR ADC with Peak-Aligned Sampling for Neural Spike Recording

    , IEEE International Symposium on Circuits and Systems (ISCAS), Publisher: IEEE, Pages: 2385-2388
  • Book chapter
    Shepherd LM, Constandinou TG, Toumazou C, 2014,

    Towards ultra-low power bio-inspired processing

    , Body Sensor Networks, Publisher: Springer London, Pages: 273-299, ISBN: 9781447163732

    The natural world is analogue and yet the modern microelectronic world with which we interact represents real world data using discrete quantities manipulated by logic. In the human space, we are entering a new wave of body-worn biosensor technology for medical diagnostics and therapy. This new trend is beginning to see the processing interface move back to using continuous quantities, which are more or less in line with the biological processes. We label this computational paradigm “bio-inspired” because of the ability of silicon chip technology which enables the use of inherent device physics, allowing us to approach the computational efficiencies of biology. From a conceptual viewpoint, this has led to a number of more specific morphologies including neuromorphic and retinomorphic processing. These have led scientists to model biological systems such as the cochlea and retina and gain not only superior computational resource efficiency (to conventional hearing aid or camera technology), but also an increased understanding of biological and neurological processes.

  • Journal article
    Navajas J, Barsakcioglu D, Eftekhar A, Jackson A, Constandinou TG, Quian Quiroga Ret al., 2014,

    Minimum Requirements for Accurate and Efficient Real-Time On-Chip Spike Sorting

    , Journal of Neuroscience Methods, Pages: 51-64
  • Journal article
    Barsakcioglu D, Liu Y, Bhunjun P, Navajas J, Eftekhar A, Jackson A, Quian Quiroga R, Constandinou TGet al., 2014,

    An Analogue Front-End Model for Developing Neural Spike Sorting Systems

    , IEEE Transactions on Biomedical Circuits and Systems, Vol: 8, Pages: 216-227
  • Conference paper
    Reverter F, Prodromakis T, Liu Y, Georgiou P, Nikolic K, Constandinou TGet al., 2014,

    Design Considerations for a CMOS Lab-on-Chip Microheater Array to Facilitate the in vitro Thermal Stimulation of Neurons

    , IEEE International Symposium on Circuits and Systems (ISCAS), Publisher: IEEE, Pages: 630-633
  • Conference paper
    Williams I, Constandinou TG, 2013,

    Modelling muscle spindle dynamics for a proprioceptive prosthesis

    , Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBS), Publisher: IEEE

    Muscle spindles are found throughout our skeletalmuscle tissue and continuously provide us with a sense of our limbs position and motion (proprioception). This paper advances a model for generating artificial muscle spindle signalsfor a prosthetic limb, with the aim of one day providing amputees with a sense of feeling in their artificial limb. By utilising the Opensim biomechanical modelling package the relationship between a joints angle and the length of surrounding muscles is estimated for a prosthetic limb. This is then applied to the established Mileusnic model to determine the associated muscle spindle firing pattern. This complete system model is then reduced to allow for a computationallyefficient hardware implementation. This reduction is achieved with minimal impact on accuracy by selecting key monoarticular muscles and fitting equations to relate joint angle to muscle length. Parameter values fitting the Mileusnic modelto human spindles are then proposed and validated against previously published human neural recordings. Finally, a model for fusimotor signals is also proposed based on data previously recorded from reduced animal experiments.

  • Conference paper
    Barsakcioglu DY, Eftekhar A, Constandinou TG, 2013,

    Design Optimisation of Front-End Neural Interfaces for Spike Sorting Systems

    , IEEE International Symposium on Circuits and Systems (ISCAS)

    This work investigates the impact of the analoguefront-end design (pre-amplifier, filter and converter) on spike sorting performance in neural interfaces. By examining key design parameters including the signal-to-noise ratio, bandwidth,filter type/order, data converter resolution and sampling rate, their sensitivity to spike sorting accuracy is assessed. This is applied to commonly used spike sorting methods such as template matching, 2nd derivative-features, and principle component analysis. The results reveal a near optimum set of parameters to increase performance given the hardware-constraints. Finally, the relative costs of these design parameters on resource efficiency (silicon area and power requirements) are quantified through reviewing the state-of-the-art.

  • Conference paper
    Koutsos E, Paraskevopoulou SE, Constandinou TG, 2013,

    A 1.5μW NEO-based Spike Detector with Adaptive-Threshold for Calibration-free Multichannel Neural Interfaces

    , IEEE International Symposium on Circuits and Systems (ISCAS)

    This paper presents a novel front-end circuit for detecting action potentials in extracellular neural recordings. By implementing a real-time, adaptive algorithm to determine an effective threshold for robustly detecting a spike, the need for calibration and/or external monitoring is eliminated. The input signal is first pre-processed by utilising a non-linear energy operator (NEO) to effectively boost the signal-to-noise ratio (SNR) of the spike feature of interest. The spike detection threshold is then determined by tracking the peak NEO response and applying a non-linear gain to realise an adaptive response to different spike amplitudes and background noise levels. The proposed algorithm and its implementation is shown to achieve both accurate and robust spike detection, by minimising falsely detected spikes and/or missed spikes. The system has been implemented in a commercially available 0.18μm technology requiring a total power consumption of 1.5μW from a 1.8V supply and occupying a compact footprint of only 0.03$\,$mm$^2$ silicon area. The proposed circuit is thus ideally suited for high-channel count, calibration-free, neural interfaces.

  • Conference paper
    Leene LB, Luan S, Constandinou TG, 2013,

    A 890fJ/bit UWB transmitter for SOC integration inhigh bit-rate transcutaneous bio-implants

    , IEEE International Symposium on Circuits and Systems (ISCAS)

    The paper presents a novel ultra low power UWBtransmitter system for near field communication in transcutaneous biotelemetries. The system utilizes an all-digital architecture based on minising the energy dissipated per bit transmitted by efficiently encoding a packet of pulses with multiple bits and utilizing oscillator referenced delays. This is achieved by introducing a novel bi-phasic 1.65 pJ per pulse UWB pulse generator together with a 72uμW DCO that provide a transmission bandwidth of 77.5 Mb/s with an energy efficiency of 890fJ per bit from a 1.2V supply. The circuit core occupies a compact silicon footprint of 0.026mm2 in a 0.18 μm CMOS technology.

  • Journal article
    Williams I, Constandinou TG, 2013,

    An Energy-Efficient, Dynamic Voltage Scaling Neural Stimulator for a Proprioceptive Prosthesis

    , IEEE Transactions on Biomedical Circuits and Systems, Vol: 7, Pages: 129-139

    This paper presents an 8 channel energy-efficient neural stimulator for generating charge-balanced asymmetric pulses. Power consumption is reduced by implementing a fully integrated DC-DC converter that uses a reconfigurable switched capacitor topology to provide 4 output voltages for Dynamic Voltage Scaling (DVS). DC conversion efficiencies of up to 82% are achieved using integrated capacitances of under 1 nF and the DVS approach offers power savings of up to 50% compared to the front end of a typical current controlled neural stimulator. A novel charge balancing method is implemented which has a low level of accuracy on a single pulse and a much higher accuracy over a series of pulses. The method used is robust to process and component variation and does not require any initial or ongoing calibration. Measured results indicate that the charge imbalance is typically between 0.05% - 0.15% of charge injected for a series of pulses. Ex-vivo experiments demonstrate the viability in using this circuit for neural activation. The circuit has been implemented in a commercially-available 0.18μm HV CMOS technology and occupies a core die area of approximately 2.8mm² for an 8 channel implementation.

  • Journal article
    Paraskevopoulou SE, Barsakcioglu D, Saberi M, Eftekhar A, Constandinou TGet al., 2013,

    Feature Extraction using First and Second Derivative Extrema (FSDE), for Real-time and Hardware-Efficient Spike Sorting

    , Journal of Neuroscience Methods, Vol: 215, Pages: 29-37, ISSN: 0165-0270

    Next generation neural interfaces aspire to achieve real-time multi-channel systems by integrating spike sorting on chip to overcome limitations in communication channel capacity. The feasibility of this approach relies on developing highly-efficient algorithms for feature extraction and clustering with the potential of low-power hardware implementation. We are proposing a feature extraction method, not requiring any calibration, based on first and second derivative features of the spike waveform. The accuracy and computational complexity of the proposed method are quantified and compared against commonly used feature extraction methods, through simulation across four datasets (with different single units) at multiple noise levels (ranging from 5 to 20% of the signal amplitude). The average classification error is shown to be below 7% with a computational complexity of 2N-3, where N is the number of sample points of each spike. Overall, this method presents a good trade-off between accuracy and computational complexity and is thus particularly well-suited for hardware-efficient implementation.

  • Conference paper
    Leene L, Liu Y, Constandinou TG, 2013,

    A Compact Recording Array for Neural Interfaces

    , IEEE Biomedical Circuits and Systems (BioCAS) Conference

    This paper presents a 44-channel front-end neural interface for recording both Extracellular Action Potentials (EAPs) and Local Field Potentials (LFPs) with 60dB dynamic range. With a silicon footprint of only 0.011mm² per recording channel this allows an unprecedented order of magnitude area reduction over state-of-the-art implementations in 0.18μm CMOS. This highly compact configuration is achievable by introducing an in-channel Sigma Delta assisted Successive Approximation Register (ΣΔ-SAR) hybrid data converter integrated into the analogue front-end. A pipelined low complexity FIR filter is distributed across 44-channels to resolve a 10-bit PCM output. The proposed system achieves an input referred noise of 6.41μVrms with a 6kHz bandwidth and sampled at 12.5kS/s, with a power consumption of 2.6μW per channel.

  • Conference paper
    Guilvard A, Eftekhar A, Luan S, Toumazou C, Constandinou TGet al., 2012,

    A Fully-Programmable Neural Interface for Multi-Polar, Multi-Channel Stimulation Strategies

    , International Symposium on Circuits and Systems (ISCAS), ISSN: 0271-4302

    This paper describes a novel integrated electrodeinterface for multi-polar stimulation of multi-electrode arrays. This interface allows for simultaneous stimulation using multiple electrodes configured as source or sink with different phase and amplitudes in order to perform field shaping inside the tissue. The system is designed in an high voltage 0.18 μm CMOS process with 8 channels. It features an output voltage swing of 16V and current up to 0.5mA for electrode impedences of up to 30kΩ which is suitable for cuff and cortical grid arrays. This electrode interface comprise a digital module which stores stimulation settings and operates the different electrode channels. Here we present the full system architecture and simulation results.

  • Conference paper
    Luan S, Constandinou TG, 2012,

    A Novel Charge-Metering Method for Voltage Mode Neural Stimulation

    , International Symposium on Circuits and Systems (ISCAS), ISSN: 0271-4302

    This paper presents a novel, fully-integrated circuit for achieving change-balanced voltage-mode neural stimulation based on a charge-metering technique. The proposed system uses two small on-chip capacitors, a counter, two comparators and a control-logic circuit to measure the charge delivered to the tissue. The circuit has been designed to deliver a maximum charge of 10.24nC to the tissue within 100us. It is shown that the charge delivery error is 0.4-4% with a maximum residual charge of -73pC. Implemented in a standard 0.18um CMOS technology, the total power consumption is 42uW (excluding stimulus).

  • Conference paper
    Mirza KB, Luan S, Constandinou TG, 2012,

    Towards a Fully-Integrated Solution for Capacitor-Based Neural Stimulation

    , International Symposium on Circuits and Systems (ISCAS), ISSN: 0271-4302

    Charge-mode stimulation (ChgMS) is a relatively new method being explored in the field of electrical neural stimulation. One of the key challenges in such a system is to overcome charge sharing between the storage capacitor and the double layer capacitor in the Electrode-Electrolyte-Interface (EEI). In this work, this issue is overcome by using a second-generation negative current conveyor (CCII-) with low current tracking error. The level of charge sharing in the circuit is expressed by a new figure of merit (charge delivery efficiency) introduced in this paper. The proposed system has a maximum power efficiency of 76.6% and a total power consumption of 270uW per electrode for a target charge stimulus of 0.9nC. Crucially, the system achieves a minimum charge delivery efficiency of 98.22%.

  • Conference paper
    Williams I, Constandinou TG, 2012,

    An Energy-Efficient, Dynamic Voltage Scaling Neural Stimulator for a Proprioceptive Prosthesis

    , International Symposium on Circuits and Systems (ISCAS), ISSN: 0271-4302

    This paper presents an energy-efficient neuralstimulator capable of providing charge-balanced asymmetric pulses. Power consumption is reduced by implementing a fully-integrated DC-DC converter that uses a reconfigurable switched capacitor topology to provide 4 output voltages for DynamicVoltage Scaling (DVS). DC conversion efficiencies of between 63% and 76% are achieved using integrated capacitances of under 1nF and the DVS approach offers power savings of up to 53.5%compared to the front end of a typical current controlled neural stimulator. Charge balancing is achieved to a low level of accuracy on a single pulse and a much higher accuracy over a series ofpulses. The method used is robust to process and component variation and does not require any initial or ongoing calibration. Monte-Carlo simulations indicate that the charge imbalance willbe less than 0.014% (at 3 sigma ) of charge delivered for a series of pulses. The circuit has been designed in a commercially-available0.18 m HV CMOS technology and requires a die areaof <0.5 sq. mm for a 16 channel implementation.

  • Conference paper
    Paraskevopoulou SE, Constandinou TG, 2012,

    An Ultra-Low-Power Front-End Neural Interface with Automatic Gain for Uncalibrated Monitoring

    , International Symposium on Circuits and Systems (ISCAS), ISSN: 0271-4302

    This paper presents a dynamic front-end towards achieving unsupervised single-neuron activity monitoring. By implementing at the front-end, an automatic gain control that is optimised for neural signal dynamics, subsequent processing can be achieved without the need for calibration. The system uses three amplification stages (low-noise first stage, variable-gain second stage and high-gain third stage), a tuneable high-pass filter, and a feedback loop to tune the variable gain. The circuit has been implemented in a commercially-available 0.18um CMOS technology with total power consumption between 1.79 and 1.95$uW$ The front-end achieves a variable gain from 52 to 86.4dB with 3kHz bandwidth and a high-pass filter that is tuneable from 100-300Hz. The input referred noise is 9.66uV with a total harmonic distortion of under 1%.

  • Conference paper
    Haaheim B, Constandinou TG, 2012,

    A Sub-1μW, 16kHz Current-Mode SAR-ADC for Neural Spike Recording

    , International Symposium on Circuits and Systems (ISCAS), Publisher: IEEE, ISSN: 0271-4302

    This paper presents an ultra-low-power 8-bit asynchronous current-mode (CM) successive approximation (SAR) analogue-to-digital converter (ADC) for single-neuron spike recording. The novel design exploits CM techniques to support operation at supply voltages down to 1.2V, consuming under500nA at 16kSamples/s. The design features easy scalability, and allows for a tuneable sampling frequency and dynamic range (DR). The circuit is designed in a commercially-available 0.18u mCMOS technology and occupies a chip area of 0.078 sq.mm. The system requires a single, post-fabrication current calibration supportedby on-chip circuitry to ensure robust operation through process and mismatch variations.

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