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Conference paperWilliams I, Constandinou TG, 2013,
Modelling muscle spindle dynamics for a proprioceptive prosthesis
, Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBS), Publisher: IEEEMuscle spindles are found throughout our skeletalmuscle tissue and continuously provide us with a sense of our limbs position and motion (proprioception). This paper advances a model for generating artificial muscle spindle signalsfor a prosthetic limb, with the aim of one day providing amputees with a sense of feeling in their artificial limb. By utilising the Opensim biomechanical modelling package the relationship between a joints angle and the length of surrounding muscles is estimated for a prosthetic limb. This is then applied to the established Mileusnic model to determine the associated muscle spindle firing pattern. This complete system model is then reduced to allow for a computationallyefficient hardware implementation. This reduction is achieved with minimal impact on accuracy by selecting key monoarticular muscles and fitting equations to relate joint angle to muscle length. Parameter values fitting the Mileusnic modelto human spindles are then proposed and validated against previously published human neural recordings. Finally, a model for fusimotor signals is also proposed based on data previously recorded from reduced animal experiments.
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Conference paperLeene LB, Luan S, Constandinou TG, 2013,
A 890fJ/bit UWB transmitter for SOC integration inhigh bit-rate transcutaneous bio-implants
, IEEE International Symposium on Circuits and Systems (ISCAS)The paper presents a novel ultra low power UWBtransmitter system for near field communication in transcutaneous biotelemetries. The system utilizes an all-digital architecture based on minising the energy dissipated per bit transmitted by efficiently encoding a packet of pulses with multiple bits and utilizing oscillator referenced delays. This is achieved by introducing a novel bi-phasic 1.65 pJ per pulse UWB pulse generator together with a 72uμW DCO that provide a transmission bandwidth of 77.5 Mb/s with an energy efficiency of 890fJ per bit from a 1.2V supply. The circuit core occupies a compact silicon footprint of 0.026mm2 in a 0.18 μm CMOS technology.
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Conference paperKoutsos E, Paraskevopoulou SE, Constandinou TG, 2013,
A 1.5μW NEO-based Spike Detector with Adaptive-Threshold for Calibration-free Multichannel Neural Interfaces
, IEEE International Symposium on Circuits and Systems (ISCAS)This paper presents a novel front-end circuit for detecting action potentials in extracellular neural recordings. By implementing a real-time, adaptive algorithm to determine an effective threshold for robustly detecting a spike, the need for calibration and/or external monitoring is eliminated. The input signal is first pre-processed by utilising a non-linear energy operator (NEO) to effectively boost the signal-to-noise ratio (SNR) of the spike feature of interest. The spike detection threshold is then determined by tracking the peak NEO response and applying a non-linear gain to realise an adaptive response to different spike amplitudes and background noise levels. The proposed algorithm and its implementation is shown to achieve both accurate and robust spike detection, by minimising falsely detected spikes and/or missed spikes. The system has been implemented in a commercially available 0.18μm technology requiring a total power consumption of 1.5μW from a 1.8V supply and occupying a compact footprint of only 0.03$\,$mm$^2$ silicon area. The proposed circuit is thus ideally suited for high-channel count, calibration-free, neural interfaces.
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Conference paperBarsakcioglu DY, Eftekhar A, Constandinou TG, 2013,
Design Optimisation of Front-End Neural Interfaces for Spike Sorting Systems
, IEEE International Symposium on Circuits and Systems (ISCAS)This work investigates the impact of the analoguefront-end design (pre-amplifier, filter and converter) on spike sorting performance in neural interfaces. By examining key design parameters including the signal-to-noise ratio, bandwidth,filter type/order, data converter resolution and sampling rate, their sensitivity to spike sorting accuracy is assessed. This is applied to commonly used spike sorting methods such as template matching, 2nd derivative-features, and principle component analysis. The results reveal a near optimum set of parameters to increase performance given the hardware-constraints. Finally, the relative costs of these design parameters on resource efficiency (silicon area and power requirements) are quantified through reviewing the state-of-the-art.
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Journal articleWilliams I, Constandinou TG, 2013,
An Energy-Efficient, Dynamic Voltage Scaling Neural Stimulator for a Proprioceptive Prosthesis
, IEEE Transactions on Biomedical Circuits and Systems, Vol: 7, Pages: 129-139This paper presents an 8 channel energy-efficient neural stimulator for generating charge-balanced asymmetric pulses. Power consumption is reduced by implementing a fully integrated DC-DC converter that uses a reconfigurable switched capacitor topology to provide 4 output voltages for Dynamic Voltage Scaling (DVS). DC conversion efficiencies of up to 82% are achieved using integrated capacitances of under 1 nF and the DVS approach offers power savings of up to 50% compared to the front end of a typical current controlled neural stimulator. A novel charge balancing method is implemented which has a low level of accuracy on a single pulse and a much higher accuracy over a series of pulses. The method used is robust to process and component variation and does not require any initial or ongoing calibration. Measured results indicate that the charge imbalance is typically between 0.05% - 0.15% of charge injected for a series of pulses. Ex-vivo experiments demonstrate the viability in using this circuit for neural activation. The circuit has been implemented in a commercially-available 0.18μm HV CMOS technology and occupies a core die area of approximately 2.8mm² for an 8 channel implementation.
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Journal articleParaskevopoulou SE, Barsakcioglu D, Saberi M, et al., 2013,
Feature Extraction using First and Second Derivative Extrema (FSDE), for Real-time and Hardware-Efficient Spike Sorting
, Journal of Neuroscience Methods, Vol: 215, Pages: 29-37, ISSN: 0165-0270Next generation neural interfaces aspire to achieve real-time multi-channel systems by integrating spike sorting on chip to overcome limitations in communication channel capacity. The feasibility of this approach relies on developing highly-efficient algorithms for feature extraction and clustering with the potential of low-power hardware implementation. We are proposing a feature extraction method, not requiring any calibration, based on first and second derivative features of the spike waveform. The accuracy and computational complexity of the proposed method are quantified and compared against commonly used feature extraction methods, through simulation across four datasets (with different single units) at multiple noise levels (ranging from 5 to 20% of the signal amplitude). The average classification error is shown to be below 7% with a computational complexity of 2N-3, where N is the number of sample points of each spike. Overall, this method presents a good trade-off between accuracy and computational complexity and is thus particularly well-suited for hardware-efficient implementation.
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Journal articleWoods SP, Constandinou TG, 2013,
Wireless Capsule Endoscope for Targeted Drug Delivery: Mechanics and Design Considerations
, IEEE Transactions on Biomedical Engineering, Vol: 60, Pages: 945-953, ISSN: 0018-9294This paper describes a platform to achieve targeted drug delivery in next generation wireless capsule endoscopy. The platform consists of two highly novel sub-systems: one is a micro-positioning mechanism which can deliver 1ml of targeted medication and the other is a holding mechanism which gives the functionality of resisting peristalsis. The micro-positioning mechanism allows a needle to be positioned within a 22.5⁰ segment of a cylindrical capsule and be extendible by up to 1.5mm outside the capsule body. The mechanism achieves both these functions using only a single micro-motor and occupying a total volume of just 200mm³. The holding mechanism can be deployed diametrically opposite the needle in 1.8s and occupies a volume of just 270mm³. An in-depth analysis of the mechanics is presented and an overview of the requirements necessary to realise a total system integration is discussed. It is envisaged that the targeted drug delivery platform will empower a new breed of capsule micro-robots for therapy in addition to diagnostics for pathologies such as ulcerative colitis and small intestinal Crohn's disease.
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Conference paperLeene L, Liu Y, Constandinou TG, 2013,
A Compact Recording Array for Neural Interfaces
, IEEE Biomedical Circuits and Systems (BioCAS) ConferenceThis paper presents a 44-channel front-end neural interface for recording both Extracellular Action Potentials (EAPs) and Local Field Potentials (LFPs) with 60dB dynamic range. With a silicon footprint of only 0.011mm² per recording channel this allows an unprecedented order of magnitude area reduction over state-of-the-art implementations in 0.18μm CMOS. This highly compact configuration is achievable by introducing an in-channel Sigma Delta assisted Successive Approximation Register (ΣΔ-SAR) hybrid data converter integrated into the analogue front-end. A pipelined low complexity FIR filter is distributed across 44-channels to resolve a 10-bit PCM output. The proposed system achieves an input referred noise of 6.41μVrms with a 6kHz bandwidth and sampled at 12.5kS/s, with a power consumption of 2.6μW per channel.
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Conference paperGuilvard A, Eftekhar A, Luan S, et al., 2012,
A Fully-Programmable Neural Interface for Multi-Polar, Multi-Channel Stimulation Strategies
, International Symposium on Circuits and Systems (ISCAS), ISSN: 0271-4302This paper describes a novel integrated electrodeinterface for multi-polar stimulation of multi-electrode arrays. This interface allows for simultaneous stimulation using multiple electrodes configured as source or sink with different phase and amplitudes in order to perform field shaping inside the tissue. The system is designed in an high voltage 0.18 μm CMOS process with 8 channels. It features an output voltage swing of 16V and current up to 0.5mA for electrode impedences of up to 30kΩ which is suitable for cuff and cortical grid arrays. This electrode interface comprise a digital module which stores stimulation settings and operates the different electrode channels. Here we present the full system architecture and simulation results.
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Conference paperLuan S, Constandinou TG, 2012,
A Novel Charge-Metering Method for Voltage Mode Neural Stimulation
, International Symposium on Circuits and Systems (ISCAS), ISSN: 0271-4302This paper presents a novel, fully-integrated circuit for achieving change-balanced voltage-mode neural stimulation based on a charge-metering technique. The proposed system uses two small on-chip capacitors, a counter, two comparators and a control-logic circuit to measure the charge delivered to the tissue. The circuit has been designed to deliver a maximum charge of 10.24nC to the tissue within 100us. It is shown that the charge delivery error is 0.4-4% with a maximum residual charge of -73pC. Implemented in a standard 0.18um CMOS technology, the total power consumption is 42uW (excluding stimulus).
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Conference paperHaaheim B, Constandinou TG, 2012,
A Sub-1μW, 16kHz Current-Mode SAR-ADC for Neural Spike Recording
, International Symposium on Circuits and Systems (ISCAS), Publisher: IEEE, ISSN: 0271-4302This paper presents an ultra-low-power 8-bit asynchronous current-mode (CM) successive approximation (SAR) analogue-to-digital converter (ADC) for single-neuron spike recording. The novel design exploits CM techniques to support operation at supply voltages down to 1.2V, consuming under500nA at 16kSamples/s. The design features easy scalability, and allows for a tuneable sampling frequency and dynamic range (DR). The circuit is designed in a commercially-available 0.18u mCMOS technology and occupies a chip area of 0.078 sq.mm. The system requires a single, post-fabrication current calibration supportedby on-chip circuitry to ensure robust operation through process and mismatch variations.
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Conference paperWilliams I, Constandinou TG, 2012,
An Energy-Efficient, Dynamic Voltage Scaling Neural Stimulator for a Proprioceptive Prosthesis
, International Symposium on Circuits and Systems (ISCAS), ISSN: 0271-4302This paper presents an energy-efficient neuralstimulator capable of providing charge-balanced asymmetric pulses. Power consumption is reduced by implementing a fully-integrated DC-DC converter that uses a reconfigurable switched capacitor topology to provide 4 output voltages for DynamicVoltage Scaling (DVS). DC conversion efficiencies of between 63% and 76% are achieved using integrated capacitances of under 1nF and the DVS approach offers power savings of up to 53.5%compared to the front end of a typical current controlled neural stimulator. Charge balancing is achieved to a low level of accuracy on a single pulse and a much higher accuracy over a series ofpulses. The method used is robust to process and component variation and does not require any initial or ongoing calibration. Monte-Carlo simulations indicate that the charge imbalance willbe less than 0.014% (at 3 sigma ) of charge delivered for a series of pulses. The circuit has been designed in a commercially-available0.18 m HV CMOS technology and requires a die areaof <0.5 sq. mm for a 16 channel implementation.
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Conference paperParaskevopoulou SE, Constandinou TG, 2012,
An Ultra-Low-Power Front-End Neural Interface with Automatic Gain for Uncalibrated Monitoring
, International Symposium on Circuits and Systems (ISCAS), ISSN: 0271-4302This paper presents a dynamic front-end towards achieving unsupervised single-neuron activity monitoring. By implementing at the front-end, an automatic gain control that is optimised for neural signal dynamics, subsequent processing can be achieved without the need for calibration. The system uses three amplification stages (low-noise first stage, variable-gain second stage and high-gain third stage), a tuneable high-pass filter, and a feedback loop to tune the variable gain. The circuit has been implemented in a commercially-available 0.18um CMOS technology with total power consumption between 1.79 and 1.95$uW$ The front-end achieves a variable gain from 52 to 86.4dB with 3kHz bandwidth and a high-pass filter that is tuneable from 100-300Hz. The input referred noise is 9.66uV with a total harmonic distortion of under 1%.
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Conference paperMirza KB, Luan S, Constandinou TG, 2012,
Towards a Fully-Integrated Solution for Capacitor-Based Neural Stimulation
, International Symposium on Circuits and Systems (ISCAS), ISSN: 0271-4302Charge-mode stimulation (ChgMS) is a relatively new method being explored in the field of electrical neural stimulation. One of the key challenges in such a system is to overcome charge sharing between the storage capacitor and the double layer capacitor in the Electrode-Electrolyte-Interface (EEI). In this work, this issue is overcome by using a second-generation negative current conveyor (CCII-) with low current tracking error. The level of charge sharing in the circuit is expressed by a new figure of merit (charge delivery efficiency) introduced in this paper. The proposed system has a maximum power efficiency of 76.6% and a total power consumption of 270uW per electrode for a target charge stimulus of 0.9nC. Crucially, the system achieves a minimum charge delivery efficiency of 98.22%.
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Journal articleConstandinou TG, Hafliger P, 2012,
Guest Editorial - Special Issue on Selected Papers From BioCAS 2011
, IEEE Transactions on Biomedical Circuits and Systems, Vol: 6, Pages: 401-402, ISSN: 1932-4545 -
Conference paperWoods SP, Constandinou TG, 2011,
Towards a micropositioning system for targeted drug delivery in wireless capsule endoscopy
, Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBS), Publisher: IEEE, Pages: 7372-7375, ISSN: 1557-170XThis paper describes a novel micropositioningmechanism for achieving 1ml of targeted drug delivery within wireless capsule endoscopes. The mechanism allows a needle to be positioned within a 22.5° segment of a cylindrical capsule and be extendible by up to 4mm. The mechanism achieves both these functions using only a single micromotor and occupying a volume of just 200mm³ (including micromotor), this represents only 6.6% of the total available space. Through a detailed stress analysis it has been shown that the proposed mechanismcan be fabricated using FDA approved materials and requires a power budget of under 3.3% of the available capacity. It is envisaged this mechanism would empower a new breed of capsule microrobots for therapy in addition to diagnostics for pathologies such as ulcerative colitis and small intestinal Crohn’s disease.
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Journal articleLiu Y, Georgiou P, Prodromakis T, et al., 2011,
An Extended CMOS ISFET Model Incorporating the Physical Design Geometry and the Effects on Performance and Offset Variation
, IEEE Transactions on Electron Devices, Vol: 58, Pages: 4414-4422, ISSN: 0018-9383This paper presents an extended model for theCMOS-based Ion-Sensitive-Field-Effect-Transistor (ISFET), incorporating design parameters associated with the physicalgeometry of the device. This can, for the first time, provide a good match between calculated and measured characteristics bytaking into account the effects of non-idealities such as threshold voltage variation and sensor noise. The model is evaluated through a number of devices with varying design parameters (chemical sensing area and MOSFET dimensions) fabricated ina commercially-available 0.35μm CMOS technology. Threshold voltage, subthreshold slope, chemical sensitivity, drift and noisewere measured and compared to the simulated results. The first and second order effects are analysed in detail and it is shown that the sensors’ performance was in agreement with the proposed model.
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Journal articleGeorgiou J, Andreou AG, 2011,
Special Issue on Selected Papers From BioCAS 2010
, IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, Vol: 5, Pages: 401-402, ISSN: 1932-4545 -
Journal articleNikolic K, Serb A, Constandinou TG, 2011,
An Optical Modulator in Unmodified, Commercially-Available CMOS Technology
, IEEE Photonics Technology Letters, Vol: 23, Pages: 1115-1117, ISSN: 1041-1135Here we present a method and structures for mid-infrared, free-space optical communication using unmodified, commercially available complementary metal-oxide semiconductor integrated circuits. The modulator is based onthe free carrier absorption in parasitic PN junction structures under reverse bias. Measured results demonstrate the proof-of-concept with speeds of 100bps (1.55um wavelength), but at least two orders of magnitude improvement can be achieved. This technology will enable non-galvanic chip-to-chip and chip-to-package communication as an alternative to wirebonding in applications that benefit from a planar top chip surface, such as chemical sensing lab-on-chip systems as well as general sensorsand mid-infrared communication.
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PatentGeorgiou P, Prodromakis T, Constandinou TG, et al., 2011,
Sensor Array for Measuring Neural Activity
A sensor system comprising a substrate and integrated onto the substrate an array (7) of sensor elements (1), each sensor element comprising one or more inductors (3), one or more electrochemical sensors (4), and one or more optical sensors (2). The system further comprising a controller configured in use to separately address each of the sensor elements (1) to drive the respective inductors and receive outputs of the respective sensors.
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